1. Field of the Invention
The present invention generally relates to non-volatile semiconductor memory devices, and, more particularly, to a non-volatile semiconductor memory device that has protection functions to prevent data damage due to a wrong write operation.
2. Description of the Related Art
Conventionally, a flash memory has a protection function to prevent data damage due to a wrong write operation. A memory cell array in the flash memory is divided into blocks that are erase units, and protection is provided for each erase unit. The size of each block is normally 64 Kbytes. In order to provide protection for an even smaller unit, there has been a demand to reduce the size of blocks. However, blocks are physically independent of each other. If the block size becomes too small, the chip size becomes too large. When the block size is 64 Kbytes, a 4-Mbit memory contains 8 blocks, and an 8-Mbit memory contains 16 blocks. A flash memory contains non-volatile memory elements that store the same number of protection information pieces as the number of blocks, and each block is protected using the non-volatile memory elements.
Meanwhile, as flash memories have been increasing in capacity, 32-Mbit flash memories and 64-Mbit flash memories have been developed. A 64-Mbit memory contains 164 blocks. Accordingly, as the number of blocks inside a memory increases, the same number of non-volatile memory elements that store protection information is required. As a result, the chip size also increases. Therefore, in a large-volume memory, protection is provided for a plurality of blocks at once, so as to reduce the number of non-volatile memory elements required and also reduce the chip size.
In a flash memory, a storage area that stores information such as manufacturer information is included, as well as a main storage area. Such a storage area is called a hidden block. Once protection is provided for the hidden block, the protected state cannot be canceled. The size of the hidden block varies with the type of the flash memory, for instance, in a range of 512 bytes to 64 Kbytes.
When a program is executed on a flash memory, the protection status of a block to be programmed should be read out from the memory elements prior to the execution of the program. If the block should be protected, a program voltage is generated so as to provide the protection.
FIG. 1 is a schematic view of the structure of a conventional flash memory 100. This flash memory 100 comprises a main storage area 101, a hidden block 104, y-decoders 106-1 to 106-4, an address buffer 110, a block select decoder 111, an x-predecoder 112, a hidden block x-predecoder 113, a protection status memory element group 114, a program voltage generating circuit 115, and a sense amplifier and input/output buffer unit 116. The main storage area 101 comprises erase units (blocks) 101-1 to 101-n, and x-decoders 102 and 103. The hidden block 104 is provided with a hidden block x-decoder 105.
When data is read from the flash memory 100, an address is inputted into the address buffer 110. The address buffer 110 then sends a block address to the block select decoder 111 in accordance with the inputted address. A block select signal outputted from the block select decoder 111 and a row address supplied from the address buffer 110 are decoded by the x-predecoder 112, and the output of the x-predecoder 112 is sent to the x-decoders 102 and 103. The x-decoders 102 and 103 select one of the word lines of memory cells. The y-decoders 106-1 to 106-4 then select a bit line in accordance with the block select signal and a column address. By doing so, the data stored in the selected memory cell is sent to a data bus line, and then outputted as output data via the sense amplifier and input/output buffer unit 116.
When data is stored in the flash memory 100, i.e., when a program is executed, a program execution command is inputted. Upon receipt of the program execution command, information stored in the protection status memory element corresponding to a block having a cell to be programmed is examined. If the information stored in the protection status memory element is in an unprotected state (i.e., a state that requires no protection), input data is stored in the cell selected in accordance with an address input by executing the program and by a program voltage being generated in the program voltage generating circuit 115 in accordance with the input data, as in the above-mentioned case of reading data from the flash memory. By contrast, if the information stored in the protection status memory element is in a protected state (i.e., a state that requires protection), the program voltage generating circuit 115 is not activated so as not to generate a program voltage. In such a case, a cell is also selected in accordance with an address input in the same manner as in the above-mentioned case of reading data. However, with no program voltage, the program is not executed on the selected cell.
Meanwhile, when reading is performed or a program is executed on the hidden block 104, a hidden block access command 123 is inputted into hidden block memory elements in the hidden block x-predecoder 113 and the protection status memory element group 114. A word line is then selected in the hidden block 104 via the hidden block x-decoder 105, and reading is performed or the program is executed on the selected memory cell in the hidden block, in the same manner as in the above-mentioned case of performing reading or executing a program on a selected memory cell in the main storage area 101.
FIGS. 2A to 2C show a conventional protection method. In this figure, the same components as in FIG. 1 are denoted by the same reference numerals. As shown in FIGS. 2A to 2C, the protection status memory element group 114 comprises a judgement circuit 202 and non-volatile memory elements 201-1 to 201-4 that store protection statuses of the blocks to be protected. The numbers (1) to (4) allotted to the non-volatile memory elements 201-1 to 201-4 and the blocks 101-1 to 101-4 indicate block addresses.
FIG. 2A illustrates a state in which no data is stored in any of the blocks 101-1 to 101-4, and no protection is provided. In this state, 64-Kbyte data is to be written in the block with the block address (2).
When a program is executed, information stored in the non-volatile memory element 201-2 of the block address (2) is first read from the protection status memory element group 114. If the information stored in the non-volatile memory element 201-2 is xe2x80x9c0xe2x80x9d, the block with the block address (2) is in the unprotected state. If the information stored in the non-volatile memory element 201-2 is xe2x80x9c1xe2x80x9d, the block with the block address (2) is in the protected state. In the case shown in FIG. 2A, xe2x80x9c0xe2x80x9d is read out from the non-volatile memory element 201-2. Accordingly, the block with the block address (2) is in the unprotected state, and a program voltage is generated by the program voltage generating circuit 115. The block with the block address (2) is selected in accordance with an inputted address in the same manner as described with reference to FIG. 1, and the 64-Kbyte input data is written in the block with the block address (2). In the non-volatile memory element 201-2 in the protection status memory element group 114, xe2x80x9c1xe2x80x9d is written so as to indicate the protected state.
FIG. 2B shows a case where more data is to be added to the block with the block address (2), which already holds data and is protected. The information stored in the non-volatile memory element 201-2 with the block address (2) is read from the protection status memory element group 114. Since xe2x80x9c1xe2x80x9d is read out from the non-volatile memory element 201-2, the block with the block address (2) is in the protected state in this case. Accordingly, no program voltage is generated by the program voltage generating circuit 115, and the sense amplifier and input/output buffer unit 116 is not activated. As described in the case shown in FIG. 1, even if an address is inputted from the outside, no data is written in the block with the block address (2).
FIG. 2C shows a case where 64-Kbyte data is to be written in the block with the block address (4) while the non-volatile memory element 201-2 with the block address (2) is protected. In this case, the data is written in the block with the block address (4), and xe2x80x9c1xe2x80x9d is written in the non-volatile memory element 201-4 in the protection status memory element group 114.
In recent years, as the capacity of a flash memory has increased, a method of providing protection for a plurality of blocks at once has been more and more often employed. As a result, protection can be provided for large-size data, for instance, 256-Kbyte data. However, the amount of data to be protected is normally not as large as 256 Kbytes, and a large proportion of the protected area is left unused. In a case where the amount of data to be protected is 100 Kbytes, for instance, no data is stored in the remaining 156-Kbytes data area.
In a hidden mode in which data having a few bytes is written in the hidden block, the remaining area in the hidden block cannot be used, once protection is provided for the hidden block. However, there is an increasing demand to write data in the remaining area in the hidden block without destroying the already written data.
To satisfy such a demand, the size of each block should be reduced. However, smaller blocks result in an increase in memory element size, as mentioned above.
Furthermore, an access to the hidden block requires a smaller area, compared with an access to the main storage area. Accordingly, there is also a demand to make an access without inputting an address. At the present, however, it is necessary to input an address to select the memory cells of the hidden block.
A general object of the present invention is to provide non-volatile semiconductor memory devices in which the above disadvantages are eliminated.
A more specific object of the present invention is to provide a non-volatile semiconductor memory device that can protect each block without increasing the memory element area, and make an access to the memory cells in a hidden block with no address input in a hidden mode.
The above objects of the present invention are achieved by a non-volatile semiconductor memory device that is electrically rewritable, which device comprises: K non-volatile memory elements that store protection information; a non-volatile memory element that stores information concerning a protection status; and a storage area that is logically divided into 2K or less blocks. In this device, a write operation on successive blocks in the storage area is inhibited in accordance with the protection information stored in the K non-volatile memory elements and the information concerning the protection status stored in the non-volatile memory element.
With the above structure, a write operation is performed logically in a first block, and the first block is then protected. Here, the K non-volatile memory elements store information indicating a block in which data has last been written. At the same time, information indicating a protected state is written in the non-volatile memory element that stores the protection status. Accordingly, the write operation is resumed in the block next to the last written block indicated by the information stored in the K non-volatile memory elements. Thus, the written data can be prevented from being destroyed.
The above objects of the present invention are also achieved by a non-volatile semiconductor memory device that is electrically rewritable, which device comprises: K non-volatile memory elements that store protection information; and a storage area that is logically divided into 2K or less blocks. In this device, successive blocks are released from a write inhibited state in the storage area, in accordance with the protection information stored in the K non-volatile memory elements.
In the above structure, protection is always provided. When data is to be written, the write inhibition is cancelled in a block indicated by the protection information as the first block in which the write inhibition can be cancelled. The protection information is stored in the K non-volatile memory elements. After the data has been written, the protection information indicating the block next to the last block in which the data has been written is stored in the K non-volatile memory elements. Thus, the written data can be protected from damage when more data is written.
The above and other objects and features of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings.